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Circuit construction for execution of conditional statements using least significant bit


How are two different registers being used as “control”?How exactly is the stated composite state of the two registers being produced using the $R_zz$ controlled rotations?Efficiently performing controlled rotations in HHLWould this quantum algorithm implementation work?How to prepare a superposed states of odd integers from $1$ to $sqrtN$?Why is this implementation of the order finding algorithm not working?Circuit construction for Hamiltonian simulationHow can I invert the least significant bit of a certain term of a superposed state?Implementing an oracleImplementing a controlled sum operation






.everyoneloves__top-leaderboard:empty,.everyoneloves__mid-leaderboard:empty,.everyoneloves__bot-mid-leaderboard:empty margin-bottom:0;








4












$begingroup$


Suppose I have integers and encode them as binary strings for example: $$|0rangle=|00rangle,|1rangle= |01rangle,|2rangle=|10rangle,|3rangle=|11rangle.$$



Now an $n$ bit integer, say $x$, is encoded as a state $|x_0x_1....x_n-1rangle$ with $x_0$ being the most significant bit. To check the remainder by $4$ we only care about the two least significant bit i.e. $x_n-2x_n-1$. If the remainder is $0$ or $2$ then the least significant bit is $0$, and hence for a controlled operation that executes whether the remainder is $2$ or $0$ can be triggered only by the least significant bit being $0$. But my question is if I want to execute a controlled operation conditioned on the remainder being $3$ or $1$ what should be done? Since $|3rangle=|11rangle$ and $|0rangle=|00rangle $, should this be the circuit for the control?



enter image description here










share|improve this question











$endgroup$


















    4












    $begingroup$


    Suppose I have integers and encode them as binary strings for example: $$|0rangle=|00rangle,|1rangle= |01rangle,|2rangle=|10rangle,|3rangle=|11rangle.$$



    Now an $n$ bit integer, say $x$, is encoded as a state $|x_0x_1....x_n-1rangle$ with $x_0$ being the most significant bit. To check the remainder by $4$ we only care about the two least significant bit i.e. $x_n-2x_n-1$. If the remainder is $0$ or $2$ then the least significant bit is $0$, and hence for a controlled operation that executes whether the remainder is $2$ or $0$ can be triggered only by the least significant bit being $0$. But my question is if I want to execute a controlled operation conditioned on the remainder being $3$ or $1$ what should be done? Since $|3rangle=|11rangle$ and $|0rangle=|00rangle $, should this be the circuit for the control?



    enter image description here










    share|improve this question











    $endgroup$














      4












      4








      4





      $begingroup$


      Suppose I have integers and encode them as binary strings for example: $$|0rangle=|00rangle,|1rangle= |01rangle,|2rangle=|10rangle,|3rangle=|11rangle.$$



      Now an $n$ bit integer, say $x$, is encoded as a state $|x_0x_1....x_n-1rangle$ with $x_0$ being the most significant bit. To check the remainder by $4$ we only care about the two least significant bit i.e. $x_n-2x_n-1$. If the remainder is $0$ or $2$ then the least significant bit is $0$, and hence for a controlled operation that executes whether the remainder is $2$ or $0$ can be triggered only by the least significant bit being $0$. But my question is if I want to execute a controlled operation conditioned on the remainder being $3$ or $1$ what should be done? Since $|3rangle=|11rangle$ and $|0rangle=|00rangle $, should this be the circuit for the control?



      enter image description here










      share|improve this question











      $endgroup$




      Suppose I have integers and encode them as binary strings for example: $$|0rangle=|00rangle,|1rangle= |01rangle,|2rangle=|10rangle,|3rangle=|11rangle.$$



      Now an $n$ bit integer, say $x$, is encoded as a state $|x_0x_1....x_n-1rangle$ with $x_0$ being the most significant bit. To check the remainder by $4$ we only care about the two least significant bit i.e. $x_n-2x_n-1$. If the remainder is $0$ or $2$ then the least significant bit is $0$, and hence for a controlled operation that executes whether the remainder is $2$ or $0$ can be triggered only by the least significant bit being $0$. But my question is if I want to execute a controlled operation conditioned on the remainder being $3$ or $1$ what should be done? Since $|3rangle=|11rangle$ and $|0rangle=|00rangle $, should this be the circuit for the control?



      enter image description here







      algorithm circuit-construction






      share|improve this question















      share|improve this question













      share|improve this question




      share|improve this question








      edited May 18 at 23:29









      Sanchayan Dutta

      7,26741659




      7,26741659










      asked May 18 at 18:22









      UpstartUpstart

      27819




      27819




















          1 Answer
          1






          active

          oldest

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          5












          $begingroup$

          I would use a circuit that looks like:



          enter image description here



          Where $|0rangle$ is an ancillary output bit. Assume the initial state of the system is in the standard basis.



          Here, the first $land_2(X)$ (CCNOT) applies the $X$ gate to the target qubit for all states that have their two least significant bits set to 1. Note that if none of the states have $|x_n-1rangle=|1rangle$ and $|x_n-2rangle=|1rangle$ then the $X$ gate is never applied to the ancilla.



          We then negate both of the control bits, so that if they were previously 1 they are then set to 0, and vice versa. This results in the next $land_2(X)$ gate only being applied if originally, $|x_n-1rangle=|0rangle$ and $|x_n-2rangle=|0rangle$. The final two $X$ gates uncompute the original negation, so that the original states of the two least significant bits are preserved.



          Therefore, the only states that will have the ancillary bit set to $|1rangle$, are those for which the two least significant bits were either $|00rangle$ or $|11rangle$. Satisfying the requirements of your question.



          Please let me know if I can clarify further.






          share|improve this answer











          $endgroup$













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            1 Answer
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            active

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            5












            $begingroup$

            I would use a circuit that looks like:



            enter image description here



            Where $|0rangle$ is an ancillary output bit. Assume the initial state of the system is in the standard basis.



            Here, the first $land_2(X)$ (CCNOT) applies the $X$ gate to the target qubit for all states that have their two least significant bits set to 1. Note that if none of the states have $|x_n-1rangle=|1rangle$ and $|x_n-2rangle=|1rangle$ then the $X$ gate is never applied to the ancilla.



            We then negate both of the control bits, so that if they were previously 1 they are then set to 0, and vice versa. This results in the next $land_2(X)$ gate only being applied if originally, $|x_n-1rangle=|0rangle$ and $|x_n-2rangle=|0rangle$. The final two $X$ gates uncompute the original negation, so that the original states of the two least significant bits are preserved.



            Therefore, the only states that will have the ancillary bit set to $|1rangle$, are those for which the two least significant bits were either $|00rangle$ or $|11rangle$. Satisfying the requirements of your question.



            Please let me know if I can clarify further.






            share|improve this answer











            $endgroup$

















              5












              $begingroup$

              I would use a circuit that looks like:



              enter image description here



              Where $|0rangle$ is an ancillary output bit. Assume the initial state of the system is in the standard basis.



              Here, the first $land_2(X)$ (CCNOT) applies the $X$ gate to the target qubit for all states that have their two least significant bits set to 1. Note that if none of the states have $|x_n-1rangle=|1rangle$ and $|x_n-2rangle=|1rangle$ then the $X$ gate is never applied to the ancilla.



              We then negate both of the control bits, so that if they were previously 1 they are then set to 0, and vice versa. This results in the next $land_2(X)$ gate only being applied if originally, $|x_n-1rangle=|0rangle$ and $|x_n-2rangle=|0rangle$. The final two $X$ gates uncompute the original negation, so that the original states of the two least significant bits are preserved.



              Therefore, the only states that will have the ancillary bit set to $|1rangle$, are those for which the two least significant bits were either $|00rangle$ or $|11rangle$. Satisfying the requirements of your question.



              Please let me know if I can clarify further.






              share|improve this answer











              $endgroup$















                5












                5








                5





                $begingroup$

                I would use a circuit that looks like:



                enter image description here



                Where $|0rangle$ is an ancillary output bit. Assume the initial state of the system is in the standard basis.



                Here, the first $land_2(X)$ (CCNOT) applies the $X$ gate to the target qubit for all states that have their two least significant bits set to 1. Note that if none of the states have $|x_n-1rangle=|1rangle$ and $|x_n-2rangle=|1rangle$ then the $X$ gate is never applied to the ancilla.



                We then negate both of the control bits, so that if they were previously 1 they are then set to 0, and vice versa. This results in the next $land_2(X)$ gate only being applied if originally, $|x_n-1rangle=|0rangle$ and $|x_n-2rangle=|0rangle$. The final two $X$ gates uncompute the original negation, so that the original states of the two least significant bits are preserved.



                Therefore, the only states that will have the ancillary bit set to $|1rangle$, are those for which the two least significant bits were either $|00rangle$ or $|11rangle$. Satisfying the requirements of your question.



                Please let me know if I can clarify further.






                share|improve this answer











                $endgroup$



                I would use a circuit that looks like:



                enter image description here



                Where $|0rangle$ is an ancillary output bit. Assume the initial state of the system is in the standard basis.



                Here, the first $land_2(X)$ (CCNOT) applies the $X$ gate to the target qubit for all states that have their two least significant bits set to 1. Note that if none of the states have $|x_n-1rangle=|1rangle$ and $|x_n-2rangle=|1rangle$ then the $X$ gate is never applied to the ancilla.



                We then negate both of the control bits, so that if they were previously 1 they are then set to 0, and vice versa. This results in the next $land_2(X)$ gate only being applied if originally, $|x_n-1rangle=|0rangle$ and $|x_n-2rangle=|0rangle$. The final two $X$ gates uncompute the original negation, so that the original states of the two least significant bits are preserved.



                Therefore, the only states that will have the ancillary bit set to $|1rangle$, are those for which the two least significant bits were either $|00rangle$ or $|11rangle$. Satisfying the requirements of your question.



                Please let me know if I can clarify further.







                share|improve this answer














                share|improve this answer



                share|improve this answer








                edited May 18 at 23:21

























                answered May 18 at 23:11









                Arthur-1Arthur-1

                965




                965



























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