Detect the first rising edge of 3 input signalsUnclocked, edge-triggered version of RS flip-flop?Difference between rising edge falling edge D flip flop (asynchronous reset)?Rising edge pulse detector from logic gatesCombining 8 digital signalsconvert falling / rising edge to pulses with minimal componentsPRESET and CLEAR in a D Flip FlopDigital circuit to toggle on rising edge of two signalsdigital logic - positive edge-triggered d flip flop triggers when input is on the decreasing edgegates operation in flip flop
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Detect the first rising edge of 3 input signals
Unclocked, edge-triggered version of RS flip-flop?Difference between rising edge falling edge D flip flop (asynchronous reset)?Rising edge pulse detector from logic gatesCombining 8 digital signalsconvert falling / rising edge to pulses with minimal componentsPRESET and CLEAR in a D Flip FlopDigital circuit to toggle on rising edge of two signalsdigital logic - positive edge-triggered d flip flop triggers when input is on the decreasing edgegates operation in flip flop
.everyoneloves__top-leaderboard:empty,.everyoneloves__mid-leaderboard:empty,.everyoneloves__bot-mid-leaderboard:empty margin-bottom:0;
$begingroup$
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that can do that?
I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.
digital-logic logic-gates flipflop synthesis
asked May 10 at 0:16
anhnhaanhnha
57311247
$endgroup$
|
show 2 more comments
$begingroup$
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that can do that?
I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.
digital-logic logic-gates flipflop synthesis
asked May 10 at 0:16
anhnhaanhnha
57311247
$endgroup$
3
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
1
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05
|
show 2 more comments
$begingroup$
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that can do that?
I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.
digital-logic logic-gates flipflop synthesis
asked May 10 at 0:16
anhnhaanhnha
57311247
$endgroup$
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that can do that?
I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.
digital-logic logic-gates flipflop synthesis
digital-logic logic-gates flipflop synthesis
asked May 10 at 0:16
anhnhaanhnha
57311247
asked May 10 at 0:16
anhnhaanhnha
57311247
asked May 10 at 0:16
anhnhaanhnha
57311247
asked May 10 at 0:16
anhnhaanhnha
57311247
asked May 10 at 0:16
anhnhaanhnha
57311247
57311247
3
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
1
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05
|
show 2 more comments
3
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
1
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05
3
3
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
1
1
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05
|
show 2 more comments
3 Answers
3
active
oldest
votes
$begingroup$
You could use the circuit below with 3 D flip-flops and one 3-input AND gate.
You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab
answered May 10 at 2:42
joribamajoribama
65619
$endgroup$
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
add a comment |
$begingroup$
Put each input on the set of an SR latch, and AND all the outputs together.
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
$endgroup$
add a comment |
$begingroup$
As defined 3 rising edges are asynchronous thus reset 3 latches and
NOR input= output
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
$endgroup$
add a comment |
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3 Answers
3
active
oldest
votes
3 Answers
3
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
You could use the circuit below with 3 D flip-flops and one 3-input AND gate.
You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab
answered May 10 at 2:42
joribamajoribama
65619
$endgroup$
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
add a comment |
$begingroup$
You could use the circuit below with 3 D flip-flops and one 3-input AND gate.
You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab
answered May 10 at 2:42
joribamajoribama
65619
$endgroup$
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
add a comment |
$begingroup$
You could use the circuit below with 3 D flip-flops and one 3-input AND gate.
You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab
answered May 10 at 2:42
joribamajoribama
65619
$endgroup$
You could use the circuit below with 3 D flip-flops and one 3-input AND gate.
You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab
answered May 10 at 2:42
joribamajoribama
65619
answered May 10 at 2:42
joribamajoribama
65619
answered May 10 at 2:42
joribamajoribama
65619
answered May 10 at 2:42
joribamajoribama
65619
65619
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
add a comment |
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
You can move the FF after the 3-input AND to save 2 FFs.
$endgroup$
– Paebbels
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
$begingroup$
@Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high.
$endgroup$
– joribama
yesterday
add a comment |
$begingroup$
Put each input on the set of an SR latch, and AND all the outputs together.
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
$endgroup$
add a comment |
$begingroup$
Put each input on the set of an SR latch, and AND all the outputs together.
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
$endgroup$
add a comment |
$begingroup$
Put each input on the set of an SR latch, and AND all the outputs together.
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
$endgroup$
Put each input on the set of an SR latch, and AND all the outputs together.
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
answered May 10 at 1:09
Scott SeidmanScott Seidman
22.9k43287
22.9k43287
add a comment |
add a comment |
$begingroup$
As defined 3 rising edges are asynchronous thus reset 3 latches and
NOR input= output
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
$endgroup$
add a comment |
$begingroup$
As defined 3 rising edges are asynchronous thus reset 3 latches and
NOR input= output
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
$endgroup$
add a comment |
$begingroup$
As defined 3 rising edges are asynchronous thus reset 3 latches and
NOR input= output
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
$endgroup$
As defined 3 rising edges are asynchronous thus reset 3 latches and
NOR input= output
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
answered May 10 at 1:59
Sunnyskyguy EE75Sunnyskyguy EE75
73.6k228103
73.6k228103
add a comment |
add a comment |
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3
$begingroup$
And when does out go low?
$endgroup$
– Tyler
May 10 at 0:31
1
$begingroup$
You need a combination of Flip-Flops and logic gates.
$endgroup$
– Mattman944
May 10 at 0:34
$begingroup$
Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high?
$endgroup$
– Annie
May 10 at 0:42
$begingroup$
@Tyler it will remain high from that time
$endgroup$
– anhnha
May 10 at 1:54
$begingroup$
@Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value
$endgroup$
– anhnha
May 10 at 2:05